CPU Engineer, University Graduate, 2026
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職缺描述
Due to business needs, we are prioritizing candidates that are available to start this position before the end of 2026.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
This role is eligible for visa sponsorship.
Google welcomes people with disabilities.
Minimum qualifications:
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Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
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Academic coursework in computer architecture (e.g., core, cache, memory, etc.).
Preferred qualifications:
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Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in designing/implementing or validating Register-Transfer Level (RTL) design (e.g., core, cache, fabric, memory, codec, etc.).
- Experience with Universal Verification Methodology (UVM), SystemVerilog, or other scripting languages such as C/C++, Python, Perl, Shell, Bash, etc.
- Familiarity with Advanced RISC Machine (ARM) instruction set architecture.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
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Perform performance validation and simulation using C/C++ and RTL-based models, and performance correlation.
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Participate in evaluation of future CPU designs and general architecture.
- Build functional verification infrastructure, including unit, multi-unit, core, and subsystem level verification environments.
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